ORGANIZACIJA I ARHITEKTURA RAČUNARA II

After passing the exam, it is expected that the student will be capable to: 1. Analize functioning of the processor designed based on the microprogramming control unit, 2. Describe and analize in detail the pipelining technique used to enhance computer’s performances, 3. Describe in detail the memory hierarchical organization, as well as exploiting caches and virtual memory in order to enhance computer’s performances, 4. Analize in detail functioning of the I/O devices and buses, as well as connecting and communication I/O devices to memory, processor, and operating system, 5. Define idea of parallel processors, 6. Analize functioning of the SIMD and MIMD computers, 7. Analize in detail functioning of the MIMS computers connected by a single bus and MIMD computers connected by a network.